Using SIMD Instructions to Accelerate AES with Provably Secure Higher-Order Masking

As a widely used block cipher, AES has been the target of many attacks, including side-channel attacks. Masking is a countermeasure to mitigate side-channel attacks by hiding the intermediate values used in cryptographic algorithms with random values. However, the masking scheme, especially high-order masking, has large overhead. In this paper we study efficient implementations of the higher-order masking algorithm for AES on processors with SIMD instructions. The SIMD instructions process multiple data items simultaneously, thus reducing the total execution time. The proposed implementation can defeat timing attacks, cache attacks, and power analysis attacks. On Intel processor with SSE3, our second order masking implementation is 6.8 times faster than previously reported results, and our third order masking is 5.6 times faster.